Analysis of the Bad Problem of Voids on SMT Patch Processing

In our previous analysis, the voids are already familiar to us, especially the void rate that exceeds the reliability expectations. Special attention should be paid to related problems and possible adverse consequences.

Void is not an absolute bad thing. The related welding quality problems in PCBA process will not even enter the top 5. Moreover, the voids caused by the shrinkage caused by the solidification of the solder are not directly processed by the chip processing plant, and are due to the selection of unreasonable solder paste.

So let’s share with you the other problems caused by the void in the SMT process below:

1. Shrinkage Void: It is formed by the solidification and shrinkage of solder. Most SAC solders and other lead-free solders generally shrink when solidified. Such voids generally do not appear at the interface between the PCB and the pad, and will not affect reliability (there is no possibility of cracks extending to the interface between the solder and the PCB)

2. Microvia Void: Appears on the PCB pad microvia. If this design is located in a solder joint with relatively high stress, it will have an impact on reliability. Generally, it can be solved by electric filling in the blanks.

3. MC Microvoid: It is easy to appear between Cu and high alloy. Generally, it does not appear immediately after welding. The reason for occurrence during high temperature or high temperature cycle is not very clear. It has an impact on the screenability.