The processing flow of the high-precision eight-layer printed circuit board:
Eight-layer copper-clad board blanking →drilling benchmark holes→ CNC drilling through holes→ inspection→ deburring→ brushing→ electroless plating (through-hole metallization)→ full-board thin copper plating→inspection→brushing→and screen printing of negative circuit patterns→ Curing (dry film or wet film, exposure, development)→ inspection→repair→circuit pattern plating→tin electroplating (anti-corrosive nickel/gold)→ removal of printing material (photosensitive film)→ copper etching→tin stripping→ cleaning→ brushing→ and mesh Soldering resist graphics (sticking photosensitive dry film or wet film→ exposure→ development→ thermal curing→commonly used photosensitive thermal curing green oil) → cleaning→ drying-screen printing marking character graphics→ curing-shape processing→ cleaning→ drying-electrical communication Broken inspection-spray tin or organic solder mask-inspection packaging-finished product delivery.
As far as the process is concerned, the high-precision eight-layer PCB: printed circuit boards with patterns made → acid degreasing → scanning water washing → secondary countercurrent washing → micro-etching → scanning washing → secondary countercurrent washing → copper plating Dipping → copper plating → scanning water washing → tinning prepreg → tinning → secondary countercurrent washing → lower board
For 8 layer PCB, there are via holes and blind holes. The via holes are opened from the top layer to the bottom layer. The blind holes are only visible on the top layer or the bottom layer, and the other layer is invisible, that is, blind holes. The hole is drilled from the surface, but not through all layers. There is also a buried via, which is a via in the inner layer, and the surface and bottom layers are invisible. The advantage of making buried vias and blind vias is to increase the wiring space
Eight-layer PCB circuit board wiring method: Generally speaking, it can be divided into top layer, the bottom layer, and two middle layers. The top and bottom layers are routed with signal lines. The middle layer first adds INTERNALPLANE1 and INTERNALPLANE2 with ADD PLANE through the command DESIGN/LAYERSTACKMANAGER as the most used power layer such as VCC and ground layer such as GND (that is, connect the corresponding network label.
Be careful not to use ADD LAYER, this will increase MIDPLAYER, which is mainly used for multi-layer signal line placement),
In this way, PLNNE1 and PLANE2 are two layers of copper that connect the power supply VCC and the ground GND.
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